These days, everyone’s a chips guy. For good reason: the supply chain running from lens manufacturers in Oberkochen through machine makers in Veldhoven through the production pipeline in Hsinchu all the way to Stargate datacenters training frontier AI models in Abilene is a genuine marvel. Its indispensability to frontier AI has created the field of compute governance and tripled sales of ‘Chip War’ in the world’s AI capitals, courtesy of analysts yearning to slip the word ‘yields’ into casual conversation.
The tightest bottleneck of this supply chain isn’t held by either AI superpower, and it’s not in Taiwan. The machinery that observers and analysts marvel at is built exclusively by the Dutch company ASML. Yet ASML doesn’t seem very useful to Europe right now: Nvidia captures much of the revenue, America captures the strategic upside through building advanced AI systems, and Taiwan captures the strategic leverage through hosting the chip fabs. In contrast, you don’t hear much about Europe’s decisive relevance to AI these days.
It’s really remarkable: Taiwan is reinforcing its Silicon Shield, America is building superintelligence, and they’re using European equipment bought at bargain prices to do it.
I can’t help but think Europe is getting screwed here. In theory, we have this overwhelmingly important chokepoint. In practice, Washington runs our strategic export policy and its firms capture the economic gains. Meanwhile, ASML can sell a grand total of none of its EUV machines on its home continent. Everyone in the world knows that, which means they keep calling our bluff: of course we’re not going to sell EUV to China, and of course we’re not cutting off the U.S. supply chain—because who else would we sell to?
Europe clearly wants to do something about its dismal AI strategy. From Berlaymont corridors to Le Monde column inches, European elites seem increasingly interested in action. Everyone agrees: we should get more out of our leverage than just New Yorker journalists visiting Veldhoven. But what exactly we should do, our elites are not so sure. They seem to dislike most ideas: frontier models are too expensive, compute-for-access deals are too American, and building their own chips hasn’t worked out very well before. They’re looking for an actually achievable thing, a project to endorse and support, that would give us some more European tech sovereignty.
That means there’s a gap in Europe’s grand AI strategy worth filling: a way to ride current political momentum and turn the ASML chokepoint into strategic leverage and economic power. A project that could fill this gap would be an answer to Europe’s shortage of inspiring ideas, an answer to ASML’s concerns about the TSMC monopsony, and a durable vertical integration of scattered assets into actual strategic muscle.
I think that hole in Europe’s AI strategy is fab-shaped. We should aim to build a strategically distinctive, R&D-focused logic plant in Europe: Eurofab.
The Problem
Veterans of the fight to weaponise interdependence will groan at this idea, and for good reason. Chip indigenisation policy has a mixed record at best. Semiconductor production sounds future-y, is very hard and very expensive, and takes ages to fail. That means it’s catnip for sovereignty politics, but prone to falling far short of initial ambitions.
But for better or for worse, we’re bound to try again: the European Chips Act 2.0 is already in the works, and I think we’re just one MATCH Act news cycle or Taiwan scare away from another round of chipmaking discourse in Europe. We should do better this time, and so we should take a look around.
The landmark success case is TSMC Arizona, a heroic effort to essentially airlift a square mile of Taiwan into the American desert by way of the U.S. CHIPS Act. Europe had a Chips Act too, but its results aren’t anywhere close. Arizona will build sub-2nm chips: the level of sophistication you need for frontier AI chips. Its European equivalent, Saxony’s ESMC, aims to build 16nm chips: the level of sophistication you need for vacuum cleaner robots.1
To build good chips, you need a lot of money, and we’re usually too cheap; you need buy-in from a foundry, and neither Intel nor TSMC likes us enough; and you need to have enough geopolitical heft to get the Taiwanese or Americans to share sensitive technology—and we don’t.
Instead, European chips policy has been relegated to securing chip market share more generally, including on mature nodes. That strikes me as a fool’s errand. It’s resilience slop all the way down: if only we can build enough capacity in Europe, then the world could go to hell and we’ll still be fine; we’ll pull up the drawbridges at Gibraltar and the Bosporus and let China and America set the world on fire.
I just don’t buy this resilience pitch at all. Our world is still one of tight margins, deep interdependencies and few redundancies. If Taiwan gets taken, the economy crashes, no matter how many fabs they airlift to Arizona. If the U.S. declares an all-out trade war on Europe, the situation is catastrophic either way. If a superpower builds AGI without us in the room, we will get crushed regardless. Our industrial policy should aim at interdependencies that make these outcomes less likely, not only at maximising our resilience to them.
The Wishlist
We shouldn’t be thinking about how to build a maximally redundant chip fab, but a minimally redundant one. That is to say, we should prioritise becoming strategically indispensable to the frontier AI supply chain over making that supply chain more resilient.
The guiding questions for the Eurofab research agenda are therefore: What strategically valuable gaps are there still in the chip manufacturing market? What’s the design spec for a Eurofab that does something new well, instead of something old poorly? I think it comes down to satisfying five desiderata.
Eurofab needs to do something non-fungible. The large foundries of the world have an insurmountable advantage in terms of market share and production volume; any European chip plan that tries to capture a substantial percentage of frontier chip production will fail. That was the folly of past attempts to build chips in Europe: competing on volume requires a level of industrial sophistication and per-chip efficiency that takes years to build and perhaps decades to refine. Even TSMC Arizona, built with the full backing of the American government, barely has a serious shot at high market share.
ESMC, our European equivalent, is basically all we got out of our Chips Act. It’s nice and helpful, and I’m sure it adds some resilience, or at least two more years of home appliance runway after the PLA takes Taiwan. But it’s not obviously a strategic asset; no one hesitates to screw over Europe for fear of losing access to ESMC, Europe is still not particularly resilient to a serious chip crisis despite it, and none of our ASML conundrum is solved by the marginal DUV demand it generates.
Real leverage for a smaller player instead comes from making a hard-to-replace qualitative contribution: buy the best ASML machines, pioneer a new technique, do anything and everything to make it central, and capture 100% of the market it creates. Rapid specialisation toward specific ASIC designs and R&D iteration—on optimising existing nodes and on optimising processes—seem like the most promising new niches to me.
Eurofab mustn’t threaten TSMC. All of this will be near-impossible to do without some support of and tech transfer from TSMC. They’re still the master of logic fab construction, and they have the closest relationship to ASML; whatever we want to do, we’ll be able to do it better if TSMC teaches us how. But the Taiwanese government’s—and by extension, TSMC’s—interest is to keep the leading edge on the island. Past attempts to build something valuable along the chip supply chain have tried to make TSMC less indispensable: move packaging to Arizona, move meaningful production to Saxony, so that a Taiwan invasion wouldn’t be as disruptive. But TSMC has resisted these attempts.
As a result, these projects have often run into drawn-out tech transfer quagmires, not truly managing to build up resilience and being stuck on second-best tech for longer than they might’ve liked. I think we can learn from this: leave TSMC’s economically valuable market share entirely alone, and find an element of the supply chain that complements the existing Taiwanese facilities. That works great with the non-fungibility desideratum: whatever we build adds another geopolitical chokepoint to the supply chain, but doesn’t alleviate the existing one. That’s bad news for resilience maximisers, but good news for those of us who realise that TSMC might not willingly surrender market share to Europe.
Eurofab needs to work with ASML. EUV is Europe’s only distinct advantage, and I really don’t see the argument for doing this if we don’t tap into it. Lithography is a core part of the chip fabrication process, and even slightly more suitable lithography makes massive differences in terms of yields and sophistication. Eurofab can be the place with the best lithography: exclusive access to new generations, ASML engineers on-site, custom-made High-NA EUV for Eurofab’s specific use cases. At the risk of sounding glib: if ASML’s customers complain about favoritism, they’re welcome to try buying their EUV machines somewhere else.
It’s not enough to merely build a fab that can buy the same EUV machines as anyone else, and it’s not enough to simply ask ASML to guarantee access to an equal tranche of machines. Whatever we build needs to be more tightly integrated with ASML than overseas rivals have achieved so far. Due to cultural differences and ASML’s monopsony struggles, they’ve never integrated quite as tightly as they could have with TSMC. This is the one and only unfair advantage Europe has in that chip fight: it already hosts ASML. A successful Eurofab would need to be built around that premise: Europe can incentivise and compel deep integration between its fab and ASML in a way that no other rival can.
In Brussels, you often hear skepticism of this idea—politicians and senior officials will point out to you that actually, ASML is a private company and not a strategic asset wielded by the European Commission. To that, I’ll just say that I’ve been to all the other countries that make important things and none of them have similar qualms about using their export and national security authorities. It’s time for us to get up to speed: to make use of ASML, we have to start getting a bit more comfortable with treating it as a strategic asset in much the same way that every other nation is treating its semiconductor industry.
Eurofab needs to be ‘AGI-pilled’. Obviously, AI is going to change the chip supply chain, in at least two ways: it’ll change what chips we need, and it’ll change how we build chips. As we lean more on AI to design chips for specific applications, R&D will accelerate and designs will specialise. We should expect chip generations to become obsolete more quickly, design breakthroughs to occur more frequently, and equipment to depreciate much, much more quickly. Iteration ability—on design and on process—will be much more valuable; purpose-built scaling of one specific architecture much less.
Beyond the technical side, AGI-pilledness has an economic implication: much of Eurofab’s revenue will likely come from frontier labs. Perhaps we manage to build a European frontier lab in the meantime, and that’ll be the main customer. But if we don’t, I expect the American frontier developers to ultimately be the buyers for the chips that Eurofab builds—maybe through chip firms like Nvidia, maybe directly through their vertically integrated chip businesses. Past chip projects have sometimes tried to reason from Europe-internal chip demand. In this case, that would be a dire mistake: the way to be a strategically relevant link in the chip supply chain is not to build second-best chips for second-best European software companies, but to try to become and remain part of the actual frontier supply chain. That will, inevitably and early on, require dealing with American labs to gauge their interest and calibrate to their needs.
Eurofab needs to inspire. One core benefit is tactical: Eurofab is a rare vehicle with a favourable political economy. My sense is that European politicians are excited to move, but they don’t quite know what for. They’d be happy to remove barriers and lend support to something, yet none of the specific vehicles really inspire them. That’s why they keep flirting with subsidising frontier AI models: it’s the one thing a good European would want that seems fundable and supportable. A fab is the right size for the current political economy: it’s expensive enough that it seems ambitious, but cheap enough that we could make it work; sufficiently linked into global supply chains to be useful, but sufficiently sovereignty-coded to appeal to Gaullist elements.
I want Eurofab as a means to tap into the prevailing sovereignty impulse almost as much as I want the chips themselves. My experience is that policymakers are much keener to enable something than they are to change circumstances without a hook. For a lot of the necessary policy interventions—around European coordination, state aid, permitting, energy access, and wrangling U.S. interests—Eurofab can be the tip of the spear. But for that purpose, it cannot be mediocre; no one wants to spend their political capital to enable a few guys in Saxony to build legacy chips.
So much for the design spec. Enterprising European chips analysts should tell me whether it’s delusional. In that spirit, please consider what I’ve written so far as a research agenda of sorts: can we figure out how to build a fab in Europe that fits these criteria? I’m not so sure, either. But I feel confident that we should try.
The Gameplan
Still, I’ll give you my pitch for how Eurofab should look. It should be a small R&D-focused fab where AI-designed chip processes are prototyped and refined faster than anywhere else, turning Europe’s lithography monopoly into an indispensable position in the frontier supply chain.2
Eurofab could be the central R&D facility for AI-uplifted chip design.
To my mind, this is perhaps the only leapfrogging opportunity left in the chip supply chain since the rest is locked up by incumbents and increasingly shaped by the labs as lead customers. Provided we do not suffer a software-only intelligence explosion in the next few years, perhaps the most promising pathway for AI systems to build better AI systems runs through chip design: on the advice of AI systems, we produce new chips, and ultimately use these chips to make even better systems.
For this period of iteration, you don’t actually need a lot of chip production volume; you mostly need speed. You don’t need to produce every new prototype at scale, but have to build, test, and refine a number of times per generation.
There are two loops to optimise here: designing better chips, and designing better processes. Designing better chips largely means coming up with a logic design, building a physical production layout to run wafers, and testing them. Right now, design work before fabrication and verification work after are a large part of the process; if they get compressed by AI, fast turnaround on the physical aspect becomes more important.
Designing better processes is much harder and operates on much longer timelines—it’s how fabs usually upgrade from one type of node to the next. This takes years at present, mainly because there is so much trial and error involved in setting up tool settings, process lines, mask shaping, and so on. AI may likewise compress much of the work that happens before anything is built, leaving the physical implementation as the main place to save time. Imec already does much of this work, but as a pre-commercial research facility without a strategic mandate.
My idea for Eurofab is fundamentally process-focused, because that is where ASML integration shines and where the largest acceleration benefits seem to lie. But ideally, we get to do both at the same time: a process-loop facility that offers its current best process as a pure-play foundry service.
Just for illustration, assume that Fable 8 comes up with a way to build the next generation of AI chips. Owing to the difficulty of building chips, we’ll still need a few tries to get its instructions just right—call it five iterations of setting up the actual process, measuring, testing it, seeing what works and improving, and another five iterations of optimising the actual design within the finished process, all before we can produce the chip at scale.
The limiting factor for improving chip quality then becomes how long these ten iterations take. In fact, for iterations 1 through 9, you wouldn’t care at all about the scale of production: you’d just need a very flexible, intensely monitored production line to test and iterate on and report back the results to Claude. Iteration 10 will still require production at scale elsewhere; but if a Eurofab can offer to execute on 1-9 quicker than any rival, that’s a meaningful accelerating contribution.
Going to Market
How readily can the final result of this iteration process transfer to production? I concede that current facilities will struggle to immediately implement new designs from halfway around the world. One solution is symmetry to large-scale fabs: the more the fundamental design of Eurofab resembles a TSMC facility, the easier it is to replicate its findings to larger foundries. On the face of it, that sounds like a threat to TSMC, but I believe the trick is low volume: if TSMC only exports a very small clone of its leading processes, its volume-based geopolitical play remains unthreatened by Eurofab.
Industry trends might also cut in our favour here and pull toward greater adaptability and transferability more generally: the design of more and more application-specific chips and the general trend toward chip-focused recursive self-improvement irrespective of Eurofab both mean that we will need chipmaking facilities that can pivot to new designs faster either way.
Perhaps the best model for this effort is Japanese chipmaking consortium Rapidus. In just a few years, the Japanese government has subsidised something like a domestic chip pipeline into existence: made from a mix of industrial giants and start-ups, Rapidus has actually produced prototype chips fairly quickly. It doesn’t make a lot of them, and it required a lot of subsidies to get there; but it shows that there’s a path from strategic decisions to low-nm chips within years. Rapidus drew on some exclusive assets—like a close IBM partnership—but so can we: imec is European, and one of the leading process research centres that already works closely with ASML, giving us the inklings of vertical integration to build Eurofab on top of.
Rapidus can give us a sense of feasible timelines: it got to a prototype 2nm chip at a decent throughput speed in under 3 years, seems on track for 1.4nm within 6 years, and almost fits the bill for the recursive optimisation fab I describe as is. If we just follow that proof of concept and end up splitting this market equally between Rapidus and Eurofab, I’d already be satisfied. But I think we might even be able to do better than Rapidus on two grounds: the already-discussed ASML proximity, and timing. Timing is good because we know more about AI-uplifted chip design than we did when Rapidus was first assembled—in cooperating with ASML, TSMC and the labs, we can figure out what’s not working about fast chip iteration at Rapidus or TSMC Taiwan, and fix it at Eurofab.
This R&D-focused version of Eurofab would not beat TSMC, and it wouldn’t have to. A facility of this character would be enormously beneficial to many users without invalidating Taiwan’s chokepoint at all. You’d need Eurofab to rapidly develop the design principles that TSMC and others would ultimately execute on; yet on its own it wouldn’t be worth much without Taiwanese capacity at scale. Set up right, Eurofab is a net positive for TSMC, because it offers the Taiwanese a rare opportunity to build outside of Taiwan in a way that still does not weaken the geopolitical deterrence.
Eurofab’s goal isn’t to produce high volumes of chips others already build, but to discover a new link in the supply chain, get there early, and hold it before the rest of the industry arrives. But I think this is all we’ll ever get from a chips play, anyway: not meaningful resilience or even autarky, but strategic indispensability.
I’ll have much more to say on the specifics of designing and building this facility in the near future. It’ll have much to do with tech-transfer diplomacy toward TSMC, a tighter account of the exact feedback loop and its accelerating promise, and the industrial policy that would be needed to get it up and running. Until then, today’s piece is about the strategic gap, and about inviting you to join me in trying to fill it.
It turns out being a chips guy is really, really hard. I’ve read Chip War a few times now, I’ve had meals at three different places with wafers on display, and I’m still not sure I know how to build a fab.
Instead, I’ll leave you with an idea—Eurofab as a fast-iteration R&D facility—and a research agenda: please come up with a better way to fix the same problems and fulfil the same desiderata. But of one thing I am sure: there is a fab-shaped gap in the European AI strategy.
And ESMC is the European chips success case. A planned Intel fab was touted as a sovereignty breakthrough all the way until Intel unceremoniously cancelled it, citing financial overextension.
There are safety implications, and I concede this is marginally accelerationist w/r/t timelines to seriously dangerous AI. I’m willing to bite that bullet for the purpose of putting a dent in power concentration, but reasonable views will differ.